It is known to time-multiplex data signals from several serial data input channels onto a single serial data output channel. In such applications, the signals on each of the input and output channels consist of a single serial stream with binary data represented by two different voltage levels. The clock for the binary data is generally expected to be recovered from the timing of the transitions between adjacent zero and one data bits in the input signals, even though the clock for each input channel is independent of that of the other channels. In these kinds of applications, the time multiplexing can include accepting data during a given "active" time period from one of the input channels and presenting it to the output channel, and then providing a "guard" period during which idle data is provided on the output channel before proceeding to the "active" period for the subsequent channel.
In other prior art systems, a clock signal is recovered from each of the input channels in turn, and this recovered clock signal is used to drive the data transitions on the output channel. In such systems, guard periods are used as a transition time during which the phase of the clock for the active period prior to the guard period is gradually adjusted to match the phase of the clock for the active period subsequent to the guard period. Such systems can present a clock frequency jitter on the output channel when the clock recovered from each of the input channels is at a different frequency. Even when all of the input channels are at the same frequency, a clock phase jitter can exist on the output channel when the clock recovered from each of the input channels has a different phase.